In a large scale integration circuit (LSI), as the degree of integration and the capacity are increased, the circuit size required for a semiconductor device has been gradually decreasing. For example, the most advanced devices require a line width of a few ten nm.
Enhancement of yield is essential, as the manufacture of LSI requires a large manufacturing cost. In the manufacture of the semiconductor device, a pattern is exposed and transferred onto a resist film formed on a wafer by a reduced projection exposure apparatus generally called a stepper or scanner to form a circuit pattern, using a mask or a reticle (hereinafter collectively referred to as mask) having an original image pattern, whereby the semiconductor device is manufactured. In these circumstances, a pattern defect of the mask constitutes a major cause of reduction in the yield of the semiconductor device.
In these circumstances, the pattern defect of the mask and variation of process terms and conditions at the time of exposure and transfer constitute a major cause of reduction in the yield. Along with miniaturization of an LSI pattern dimension formed on a semiconductor wafer, the size of the pattern defect of the mask is also miniaturized. The dimensional accuracy of the mask is enhanced, whereby the fluctuation of the process terms and conditions is to be absorbed, and thus, in the inspection of the mask, an extremely small pattern defect is required to be detected. The Patent Document 1 (Japanese patent number 4236825) discloses an inspection apparatus for detecting a fine defect on a mask.
Recently, as a technique for forming a fine pattern, nanoimprint lithography (NIL) has attracted attention. In this technique, a template having a nanoscale microstructure is pressured on a specific resist formed on a wafer to form the fine circuit pattern on the resist.
In the nanoimprint technology, to increase productivity, duplicate templates (replica templates) are produced using a master template as an original plate, and the replica templates are used in different nanoimprint apparatuses during forming the fine circuit pattern on the resist. The replica template is required to be produced accurately corresponding to the master template. Thus, high inspection accuracy is required for not only the master template but also the replica template.
A mask is generally formed to have a size four times larger than a circuit size. The size of a pattern of photo-mask is generally four times larger than the size of a circuit pattern formed over the wafer. The pattern is reduced and exposed onto a resist on the wafer by a reduced projection exposure device, using the photo-mask, and thereafter, the circuit pattern is developed. Meanwhile, the patterns of the template in nanoimprint lithography are formed to have the same size as the circuit patterns formed on the wafer. Thus, a shape defect in a pattern of the temperate causes a higher degree of influence to a pattern to be transferred onto the wafer than a shape defect in a pattern of the photo-mask. Accordingly, the detection of a pattern defect of the template is required to be detected with higher accuracy than the detection of the pattern defect of the photo-mask.
However, these days, as the circuit pattern size is being decreased, the pattern size is becoming smaller than the resolution of an optical system of an inspection apparatus used in the detection of a defect. For example, in the case of a line width of a pattern formed on a template being smaller than about 100 nm, the pattern cannot be resolved by a light source using DUV (Deep Ultraviolet radiation) light. Thus, although an EB (Electron Beam) source is used, throughput is low, and a problem arises in that the source cannot be mass-produced.
The present invention has been made in consideration of the above points, and provides a defect detection method in which a defect of a sample having a fine pattern can be detected.